The manufacturing of an integrated circuit ("chip") involves numerous steps, all critical to the successful implementation of the desired circuitry within each chip. The process begins with very large single crystals being grown and then sliced into wafers for subsequent processing. The wafer is a large single crystal of semiconductor material that is used as the substrate during the manufacture of a number of chips sliced from the processed wafer. Circuitry is then built onto the substrate in a plurality of steps. The number of viable chips that can be produced from a single wafer not only depends on the size and complexity of the circuits or components on the chips, but also depends upon the quality of the various manufacturing steps applied to the wafer and the purity of the environment in which the steps are performed.
One or more of the steps involved in the process is a chemical-mechanical polishing process where chemical agents and abrasives work jointly on the wafer surface to produce a mirror finish and to polish the circuitry deposited and formed on the wafer in preparation for the next step in the process. This chemical-mechanical polishing involves attaching a wafer to a machine with a motor that rotates the wafer onto a polishing pad immersed in a polishing slurry. One such mechanism is illustrated in FIG. 1 as chemical-mechanical polishing unit 100. The pad and slurry 102 is placed within a platter 104, and the wafer (not shown) is attached through suction created by a vacuum within unit 103 to the bottom of pedestal 101. Pedestal 101 then lowers the wafer surface onto the slurry pad 102 and begins rotating and moving the pedestal and attached wafer around within the slurry pad 102.
One of the challenges with this process is to polish the wafer surface uniformly. The more uniform the polishing process, the less the failure rate of the various chips sliced from the wafer.
Referring to FIGS. 2A-2E, there is illustrated prior art pedestal 200, which employs a gimbal assembly 202 in an attempt to ensure that the wafer surface is uniformly applied to the polishing slurry so that the polishing of the wafer surface is subsequently as uniform as possible. FIG. 2A illustrates a cross-section of prior art gimbal assembly 202.
Pedestal unit 200 essentially comprises three primary members: the tapered housing 201, the gimbal assembly 202, and the fluid distribution and force transmitting housing 203. The tapered housing 201 is physically attached (e.g., screwed) to unit 103, and is pivotally attached to center portion 212 of gimbal assembly 202. Force transmitting housing 203 is attached (e.g., screwed) to inner ring 212 of the gimbal assembly 202. Gimbal assembly 202 is screw-attached to tapered housing 201 through gimbal ring portion 210. A wafer holding mechanism (not shown) is then attached to the underside of housing 203 to hold the semiconductor wafer (not shown) under the vacuum force created by unit 103 and transmitted through the center 250 of pedestal unit 200.
As a rotational force is applied by polishing unit 103 to tapered housing 201, the entire pedestal unit 200 is also rotated, thus rotating the semiconductor wafer (not shown) within the slurry pad 102. However, as discussed above, if pedestal unit 200 was completely rigid (no gimbal assembly), some portions of the semiconductor wafer would be polished more than others, resulting in a non-uniform polishing of the semiconductor wafer surface, which would result in a higher failure rate for certain ones of the chips sliced from the semiconductor wafer. The prior art attempts to address this problem with gimbal assembly 202. FIG. 2B illustrates how gimbal assembly 202 is assembled, while FIG. 2C illustrates a top view of gimbal assembly 202, and FIG. 2D illustrates a perspective view of gimbal assembly 202.
The problem with gimbal assembly 202 is that it falls short of enabling the semiconductor wafer surface to be polished as uniformly as possible. The reason for this is how the gimbal assembly 202 is made. Center portion 212 pivots on the X axis created by shafts 215 and 216 relative to middle portion 211. Likewise, middle portion 211 pivots along a Y axis created by shafts 213 and 214 relative to outer ring 210. An example of such pivoting is further illustrated in FIG. 2E. As can be appreciated, if the wafer is in fixed relationship to center portion 212, and the tapered housing 201 is in fixed relationship to outer ring 210, there will be portions of the semiconductor wafer that will have greater pressure applied to them relative to the slurry pad 102 than other portions. Not only does this result in less uniformity in the polishing process, but the center and outer edge surfaces of the wafer are not polished, thus wasting these portions of the semiconductor wafer. Considering the relatively high cost of chips, especially microprocessors, wasted portions of a semiconductor wafer result in lost revenue.
Therefore, there is a need in the art for a wafer polishing mechanism that provides for more uniform polishing of the semiconductor wafer surface and polishes more surface area on the semiconductor wafer, such as the center portion and the outer edge.